In order to accommodate mechanical limitations and limited printed circuit board area, some electronic devices may utilize serial interface. For example, with a hinged cell phone, a serial interface may be used to limit the number of signals transmitted between processors to address these concerns. However, since a serial interface has only one data line for sending and receiving data, the various cycles must be split up in order to communicate which type of cycle is occurring, what address data is being read from or written to, and the data that is being transferred.
While the serial interface reduces the amount of signal lines and addresses the above concerns, there is a tradeoff. That is, the reduction of the amount of signals comes at the expense of performance, as the data must be sent serially instead of in parallel. Multiple cycles are needed to transmit a word of data rather than a single cycle as may be done with a parallel interface. The width of the serial interface, i.e., the amount of bits sent during each of the command, address, or data cycles, may vary for different devices. However, for any serial interface, irrespective of the width, the performance hit caused by the serial nature of the data transmission may become noticeable and even annoying to a user.
In view of the foregoing, there is a need to provide an apparatus and a method for communicating data over a serial interface in a more efficient manner that reduces the amount of clock cycles required for the data transmission.